Optimization of Task Scheduling and Memory Partitioning for Multiprocessor System on Chip

Multiprocessor system-on-chip (MPSoC) is an attractive solution for increase in complexity and size of embedded applications. MPSoC is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a complex electronic system. While embedded systems become increasingly complex, the increase in memory access speed has failed to keep up with the processor speed. This makes the memory access latency a major issue in scheduling embedded applications on embedded systems. Scheduling the tasks of an embedded application on the processors and partitioning the available Scratch-pad memory (SPM) budget among those processors are two critical issues in complex embedded systems. This research focuses mainly on task scheduling and SPM partitioning to reduce the execution time of embedded applications. Equally partitioned SPM reduces the computation time. To further reduce these applications computation time, available SPM can be divided between the processors in any ratio. Pipelined scheduling allows tasks of different embedded application instances to be scheduled at each stage of the pipeline.